Luan RISC CPU

Full 32bit architecture
Only 9 machine instructions, all conditional
Fully orthoganal instruction set
All instructions 16bits in size
Simple and efficient pipelining
16 general purpose 32bit registers
Full 4GB address space
von Neumann memory architecture
Under 4000 gates (depending on synthesis tool)

Software development for Luan using GCC tool chain
RTOS (MDOS) and graphical operating system (Adelian) available


Coming soon...

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